The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 2021

Filed:

Feb. 14, 2020
Applicant:

Silicon Laboratories Inc., Austin, TX (US);

Inventors:

Rex Tak Ying Wong, Singapore, SG;

Michael R. May, Austin, TX (US);

Pio Balmelli, Arogno, CH;

Assignee:

SILICON LABORATORIES INC., Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 13/40 (2006.01); G01R 19/165 (2006.01); G06F 11/22 (2006.01);
U.S. Cl.
CPC ...
G06F 1/26 (2013.01); G01R 19/16538 (2013.01); G06F 13/4027 (2013.01); G06F 11/2273 (2013.01);
Abstract

In one form, an integrated circuit includes a negative voltage detector circuit and a logic circuit. The negative voltage detector circuit has a power supply input coupled to a power supply voltage terminal, a ground input coupled to a ground voltage terminal, a first input coupled to a first signal terminal, a second input coupled to a second signal terminal, and an output for providing an enable signal when a voltage on the first signal terminal is less than a voltage on the ground voltage terminal by at least a predetermined amount when a signal on said second signal terminal is in a first predetermined logic state. The logic circuit has an input for receiving the enable signal. The logic circuit changes an operation of the integrated circuit in response to an activation of the enable signal.


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