The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 2021

Filed:

Mar. 30, 2020
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:
Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/26 (2006.01); H02H 7/12 (2006.01); H02M 3/07 (2006.01); H03K 17/693 (2006.01); H03K 17/62 (2006.01); H02P 7/03 (2016.01);
U.S. Cl.
CPC ...
G05F 3/267 (2013.01); H02H 7/1213 (2013.01); H02M 3/07 (2013.01); H02P 7/04 (2016.02); H03K 17/62 (2013.01); H03K 17/693 (2013.01);
Abstract

A driver circuit comprises a first buffer receiving a control signal, and a first transistor coupled to first buffer and an output. A second transistor is coupled to a first current mirror and the output. A third transistor is coupled to the output and an inverter. A fourth transistor receives the inverter's output at its control input and is coupled to the output. A fifth transistor is coupled to third transistor. The second, third, and fifth transistors receive supply voltage at their respective control inputs. A sixth transistor receives the control signal's inverse at its control input and is coupled to fifth transistor and a second current mirror. A current source is coupled to second current mirror and a second buffer. A seventh transistor receives the second buffer's output at its control input and is coupled to first buffer. An eighth transistor is coupled to first buffer and seventh transistor.


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