The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2021

Filed:

Jun. 24, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Kyungyeon Ha, Hwaseong-si, KR;

Yong-Ho Yoo, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/74 (2006.01); H01L 27/108 (2006.01); H01L 21/762 (2006.01); H01L 21/311 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
H01L 21/74 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/76224 (2013.01); H01L 21/823431 (2013.01); H01L 21/823475 (2013.01); H01L 21/845 (2013.01); H01L 27/10855 (2013.01); H01L 27/10885 (2013.01); H01L 27/10888 (2013.01); H01L 27/10891 (2013.01); H01L 27/10823 (2013.01);
Abstract

A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define a plurality of active regions extending in a first direction; forming a trench in an upper portion of the substrate that crosses the active regions in a second direction that intersects the first direction; forming a sacrificial layer that fills the trench; forming support patterns on the sacrificial layer, wherein the support patterns fill recessed regions provided at a top surface of the sacrificial layer; and removing the sacrificial layer. The support patterns are spaced apart from each other with the active regions interposed therebetween.


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