The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2021

Filed:

Jul. 29, 2020
Applicant:

Silicon Laboratories Inc., Austin, TX (US);

Inventors:

Linxiao Shen, Austin, TX (US);

Thomas Saroshan David, Lakeway, TX (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0045 (2013.01);
Abstract

A data synchronizer including an input stage, a driver stage, and a keeper stage. The input stage latches input data to a data node in response to a first clock signal transition. The driver stage has an input coupled to the data node and has an output coupled to a gain node. The keeper stage latches data asserted on the gain node back to the input stage to maintain data on the data node in response to a second transition of the clock signal. The driver stage has an increased drive strength and a reduced loading capacitance to increase the gain-bandwidth product of the latch loop to reduce metastability. A flip-flop may be configured with input and output latches each including driver stages having increased drive strength and reduced loading capacitance to increase the gain-bandwidth product of each of the latch loops to reduce metastability.


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