The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2021

Filed:

Dec. 03, 2020
Applicant:

Analog Devices International Unlimited Company, Limerick, IE;

Inventors:

Sharvil Pradeep Patil, Toronto, CA;

Kimo Tam, Lincoln, MA (US);

Hajime Shibata, Toronto, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/50 (2006.01); H03M 1/12 (2006.01); H03M 1/44 (2006.01); H03M 1/16 (2006.01);
U.S. Cl.
CPC ...
H03M 1/124 (2013.01); H03M 1/44 (2013.01); H03M 1/167 (2013.01);
Abstract

An example residue generation arrangement for a continuous time or hybrid ADC includes a delay circuit having a cascade of analog delay sections, each section to provide a respective delay to an analog input signal, thus providing a delayed analog input signal at the output of the delay circuit. The delay circuit further includes a selector, configured to select an input or an output of one of the delay sections to provide as an input signal to a quantizer of a feedforward path. The quantizer may generate a digital input to a DAC of the feedforward path based on the output of the selector, and the DAC may generate a feedforward path analog output based on the digital signal generated by the quantizer. The arrangement further includes a summation node, configured to generate a residue signal based on the delayed analog input and the feedforward path analog output.


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