The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2021

Filed:

Sep. 14, 2020
Applicant:

Nvidia Corp., Santa Clara, CA (US);

Inventors:

Stephen G Tell, Chapel Hill, NC (US);

Matthew Rudolph Fojtik, Chapel Hill, NC (US);

John Poulton, Chapel Hill, NC (US);

Assignee:

NVIDIA Corp., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/14 (2014.01); G04F 10/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/14 (2013.01); G04F 10/005 (2013.01);
Abstract

This disclosure relates to a circuit comprising a first, second, and third data latch, and an input for a data signal. The first data latch may be configured to sample a delayed version of the data signal in response to a first control signal. The second data latch may be configured to sample the delayed version of the data signal in response to a run clock signal. The run clock signal may be configured to run for a predefined number of clock cycles subsequent to the first control signal. The third data latch may be configured to sample either an output signal of the first data latch or an output signal of the second data latch in response to a second control signal received after the predefined number of clock cycles of the run clock signal.


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