The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 28, 2021
Filed:
Oct. 04, 2018
Applicant:
Nxp B.v., Eindhoven, NL;
Inventors:
Da-Wei Lai, Nijmegen, NL;
Stephen John Sque, Veldhoven, NL;
Wilhelmus Cornelis Maria Peters, Groesbeek, NL;
Assignee:
NXP B.V., Eindhoven, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 27/06 (2006.01); H02H 9/04 (2006.01); H01L 29/861 (2006.01); H01L 29/08 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/735 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0266 (2013.01); H01L 27/0635 (2013.01); H02H 9/046 (2013.01); H01L 29/0649 (2013.01); H01L 29/0808 (2013.01); H01L 29/0821 (2013.01); H01L 29/0847 (2013.01); H01L 29/1008 (2013.01); H01L 29/735 (2013.01); H01L 29/861 (2013.01);
Abstract
An ESD protection device including a PNP transistor connected to an input pad, a diode connected to the PNP transistor and connected to an output pad, and an NMOS transistor connected to the PNP transistor and the output pad, wherein the diode, PNP transistor, and NMOS transistor are configured to route different levels of an electrostatic discharge (ESD) current pulse from the input pad to the output pad.