The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2021

Filed:

May. 25, 2018
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Hefei Boe Optoelectronics Technology Co., Ltd., Anhui, CN;

Inventors:

Honggang Gu, Beijing, CN;

Xianjie Shao, Beijing, CN;

Lili Yao, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/20 (2006.01); G11C 19/28 (2006.01); G06F 3/041 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G11C 19/28 (2013.01); G06F 3/0412 (2013.01); G06F 3/04166 (2019.05); G09G 2300/0426 (2013.01); G09G 2300/08 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01);
Abstract

A shift register, including: a first input circuit configured to supply a first reference signal of a first reference signal terminal to the pull-up node under control of an input signal of the input signal terminal; a pull-up node state maintaining circuit configured to supply a third reference signal of the third reference signal terminal to the pull-up node when the potential of the pull-up node is a first potential, and supply a fourth reference signal of the fourth reference signal terminal to the pull-up node when the potential of the pull-up node is a second potential; and an output circuit configured to output a first clock signal of the first clock signal terminal to the gate signal output terminal under control of the potential of the pull-up node.


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