The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2021

Filed:

Dec. 23, 2019
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Sung Ho Ahn, Suwon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0604 (2013.01); G06F 3/0673 (2013.01);
Abstract

Provided herein is a semiconductor memory device including a memory cell array, a peripheral circuit, an operation information storage, and control logic. The memory cell array may include a plurality of memory cells. The peripheral circuit may perform a read operation for setup information stored in the memory cell array. The operation information storage may store the setup information. The control logic may control a read operation of the peripheral circuit and a storage operation of the operation information storage. The control logic may control the peripheral circuit and the operation information storage such that a storage section in which the operation information storage stores first setup information and a read section in which the peripheral circuit reads second setup information from the memory cell array are at least partially overlapped with each other.


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