The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Mar. 16, 2020
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Nathan F. Hanagami, San Francisco, CA (US);

Hao Zhou, San Jose, CA (US);

Jianbao Wang, Tucson, AZ (US);

Ruopeng Wang, San Jose, CA (US);

Ludmil N. Nikolov, Cupertino, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01); H03K 19/0185 (2006.01); H03K 19/003 (2006.01); H03K 19/017 (2006.01); H03K 19/21 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01); H03K 19/00384 (2013.01); H03K 19/01721 (2013.01); H03K 19/1737 (2013.01); H03K 19/215 (2013.01);
Abstract

A level shifter circuit with an intermediate power domain and method for operating the same is disclosed. The level shifter circuit includes an input circuit, an output circuit, and an intermediate circuit. The input circuit is coupled to receive an input signal from a first voltage domain operating according to a first supply voltage, and generates a first intermediate signal. The intermediate circuit receives the first intermediate signal and generates a second intermediate signal. The output circuit receives the intermediate signal and provides an output signal into a second voltage domain operating at a second supply voltage different from the first. A voltage multiplexer is configured to provide one of the first or second supply voltages to the intermediate circuit depending on a state of the input signal.


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