The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Dec. 11, 2019
Applicant:

Eaton Intelligent Power Limited, Dublin, IE;

Inventors:

Jalpa Shah, Woodbury, MN (US);

Meng Wang, Chanhassen, MN (US);

Damrongrit Piyabongkarn, Plymouth, MN (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 7/085 (2006.01); H01H 71/32 (2006.01); H02H 1/00 (2006.01); H01H 89/00 (2006.01); H02P 29/68 (2016.01); H02M 7/00 (2006.01); H05K 7/20 (2006.01); B60K 6/22 (2007.10);
U.S. Cl.
CPC ...
H02H 7/085 (2013.01); H01H 71/32 (2013.01); H01H 89/00 (2013.01); H02H 1/0007 (2013.01); H02M 7/003 (2013.01); H02P 29/68 (2016.02); H05K 7/2089 (2013.01); B60K 6/22 (2013.01); B60Y 2200/91 (2013.01); B60Y 2200/92 (2013.01);
Abstract

A multi-port power converter including a housing including a plurality of ports structured to electrically interface to a plurality of loads, the plurality of loads having distinct electrical characteristics; a plurality of solid-state components configured to provide selected electrical power outputs and to accept selected electrical power inputs; a plurality of solid-state switches configured to provide selected connectivity between the plurality of solid-state components and the plurality of ports; and a controller, the controller including: a component bank configuration circuit structured to interpret a port electrical interface description during a run-time operation of the multi-port power converter, the port electrical interface description comprising a description of at least a portion of the distinct electrical characteristics; and a component bank implementation circuit structured to provide solid switch states in response to the port electrical interface description, and wherein the plurality of solid-state switches are responsive to the solid switch states.


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