The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

May. 28, 2019
Applicant:

Tower Semiconductors Ltd., Migdal Haemek, IL;

Inventors:

Daniel Sherman, Haifa, IL;

Sagy Levy, Zichron-Yaakov, IL;

David Mistele, Migdal Haemek, IL;

Assignee:

Tower Semiconductors Ltd., Migdal Haemek, IL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7816 (2013.01); H01L 29/0634 (2013.01); H01L 29/0649 (2013.01); H01L 29/41758 (2013.01); H01L 29/66681 (2013.01);
Abstract

A LDMOS transistor that may include (i) a first region that is a reduced surface field (RESURF) implant region of a first type; (ii) a second region that is a RESURF implant region of a second type, wherein the first type differs from the second type; (iii) a gate; (iv) a stepped oxide region and a gate oxide region that are positioned above the first region and below the gate. Each one of the first region and the second region has a substantially uniform thickness


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