The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Jul. 27, 2018
Applicant:

Hitachi Automotive Systems, Ltd., Hitachinaka, JP;

Inventors:

Akihiro Namba, Tokyo, JP;

Takashi Hirao, Tokyo, JP;

Masami Oonishi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/64 (2006.01); H01L 23/367 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 25/07 (2006.01); H01L 25/16 (2006.01);
U.S. Cl.
CPC ...
H01L 23/645 (2013.01); H01L 23/3672 (2013.01); H01L 23/49844 (2013.01); H01L 24/48 (2013.01); H01L 25/072 (2013.01); H01L 25/16 (2013.01); H01L 2224/48225 (2013.01); H01L 2924/1207 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/14252 (2013.01); H01L 2924/30107 (2013.01);
Abstract

A power conversion device includes first and second power semiconductor elements, and a circuit for transferring a drive signal of the first and second power semiconductor elements. The circuit board includes a first emitter wire which is formed along an arranging direction of the first power semiconductor element and the second power semiconductor element, a first gate wire which is disposed between the first power semiconductor element and the first emitter wire, a second gate wire which is disposed between the second power semiconductor element and the emitter wire, a third gate wire which is disposed to face the first gate wire and the second gate wire with the emitter wire interposed between the third gate wire and the first gate wire and the second gate wire, and a first gate resistor which connects the first gate wire and the third gate wire over the first emitter wire.


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