The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Jun. 25, 2020
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Lalithkumar Rajendran, Austin, TX (US);

Jun woo Park, Austin, TX (US);

Garrick Chow, Foster City, CA (US);

Austin Bryant, Austin, TX (US);

Yi Li, Austin, TX (US);

Hua Wang, Austin, TX (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/4401 (2018.01); G01K 3/00 (2006.01); G06F 13/10 (2006.01); G06F 13/42 (2006.01); G01K 7/22 (2006.01); G06F 1/20 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4401 (2013.01); G01K 3/005 (2013.01); G01K 7/22 (2013.01); G06F 1/206 (2013.01); G06F 13/10 (2013.01); G06F 13/4282 (2013.01); G06F 2213/0002 (2013.01);
Abstract

Techniques for identifying thermal critical conditions in devices with multiple SoCs, and coordinating the resetting and rebooting of the SoCs to recover from the thermal critical conditions are described herein. A device may include a first SoC that monitors a first temperature sensor, and a second SoC that monitors a second temperature sensor, to determine whether temperatures in the device indicate thermal critical conditions. The second SoC may determine that a temperature determined using the second temperature sensor is above a threshold indicating a thermal critical condition, and may provide an indication to the first SoC that the temperature is above the threshold. The first SoC may detect the indication, and the first SoC and second SoC may each reset to allow the device to cool down. The first SoC and second SoC may then coordinate rebooting once the thermal critical condition is no longer detected in the device.


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