The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Dec. 20, 2018
Applicant:

Japan Display Inc., Tokyo, JP;

Inventors:

Yoshitaka Ozeki, Tokyo, JP;

Gen Koide, Tokyo, JP;

Nobutaka Ozaki, Tokyo, JP;

Assignee:

Japan Display Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 27/32 (2006.01);
U.S. Cl.
CPC ...
G02F 1/1368 (2013.01); G02F 1/136209 (2013.01); H01L 29/66765 (2013.01); H01L 29/78633 (2013.01); H01L 29/78678 (2013.01); H01L 27/3272 (2013.01);
Abstract

According to an aspect, an array substrate includes: a substrate; a light-shielding layer; a first gate electrode; a semiconductor layer; a signal line; and an electrode. A first surface of the substrate is provided with, in sequence, the light-shielding layer, the first gate electrode, the semiconductor layer, the signal line, and the electrode. The semiconductor layer includes a first impurity region electrically coupled to the electrode, a first channel region overlapping the first gate electrode, a second impurity region opposite to the first impurity region with respect to the first channel region, and a first lightly doped drain region between the first impurity region and the first channel region. The light-shielding layer has a first end and a second end opposite to each other. The first end overlaps the first channel region. The light-shielding layer overlaps a boundary between the first channel region and the first lightly doped drain region.


Find Patent Forward Citations

Ozeki, Yoshitaka. (2021). Array substrate, method for manufacturing the same, display device, and switching element (U.S. Patent No. 11126052). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11126052

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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