The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 14, 2021
Filed:
Jan. 26, 2016
China Electronic Technology Corporation, 24th Research Institute, Chongqing, CN;
Daiguo Xu, Chongqing, CN;
Gangyi Hu, Chongqing, CN;
Ruzhang Li, Chongqing, CN;
Jian'an Wang, Chongqing, CN;
Guangbing Chen, Chongqing, CN;
Yuxin Wang, Chongqing, CN;
Tao Liu, Chongqing, CN;
Lu Liu, Chongqing, CN;
Minming Deng, Chongqing, CN;
Hanfu Shi, Chongqing, CN;
Xu Wang, Chongqing, CN;
CHINA ELECTRONIC TECHNOLOGY CORPORATION, 24TH RESEARCH INSTITUTE, Chongqing, CN;
Abstract
Provided in the present invention is a transconductance amplifier based on a self-biased cascode structure. The transconductance amplifier includes a self-biased cascode input-stage structure constituted by PMOS (P-channel Metal Oxide Semiconductor) input transistors M, M, Mand M, a self-biased cascode first-stage load structure constituted by NMOS (N-channel Metal Oxide Semiconductor) transistors M, M, Mand M, a second-stage common-source amplifier structure constituted by an NMOS transistor Mand a PMOS transistor M, a bias circuit structure constituted by NMOS transistors Mand Mand a PMOS transistor M, an amplifier compensation capacitor C, an amplifier load capacitor C, a reference current source Iref and a PMOS transistor Mthat provides a constant current source function. Further provided in the present invention is a transconductance amplifier based on a self-biased cascode structure, which adopts an NMOS transistor as an input transistor. Both input transistors and load transistors of a first-stage amplifier of the present invention adopt self-biased cascode structures, such that the output impedance and the DC gain of the first-stage amplifier are increased. Substrate voltages of the MOS transistors of the first-stage amplifier are provided by an amplifier bias circuit. Owing to a connection mode of the compensation capacitor C, a higher figure of merit is achieved.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile