The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2021

Filed:

Feb. 22, 2019
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Zhaohui Qiang, Beijing, CN;

Feng Guan, Beijing, CN;

Zhi Wang, Beijing, CN;

Yupeng Gao, Beijing, CN;

Yang Lyu, Beijing, CN;

Chao Li, Beijing, CN;

Jianhua Du, Beijing, CN;

Lei Chen, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 29/417 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78636 (2013.01); H01L 29/41733 (2013.01); H01L 29/458 (2013.01); H01L 29/66765 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01); H01L 29/4908 (2013.01);
Abstract

The present disclosure provides a thin film transistor, a pixel structure, a display device, and a manufacturing method. The thin film transistor includes: a gate on the substrate; a gate insulating layer covering the gate and the substrate; a first support portion and a second support portion, which are provided on the gate insulating layer covering the substrate and located on both sides of the gate, wherein the first support portion is not connected to the second support portion; a semiconductor layer on the first support portion, the second support portion, and the gate insulating layer covering the gate; and a source and a drain respectively connected to the semiconductor layer. The first support portion and the second support portion are respectively configured to support the semiconductor layer.


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