The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2021

Filed:

Jun. 08, 2018
Applicant:

Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Hubei, CN;

Inventor:

Caiqin Chen, Hubei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 51/56 (2006.01); H01L 51/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3258 (2013.01); H01L 27/3276 (2013.01); H01L 51/56 (2013.01); H01L 51/0097 (2013.01); H01L 2227/323 (2013.01); H01L 2251/5338 (2013.01);
Abstract

A display panel is provided. The display panel includes: a substrate having a display region and a bending region; a buffer layer having a first buffer layer disposed in the display region and a second buffer layer disposed in the bending region; a thin-film transistor disposed on the first buffer layer; an insulated combination layer disposed in the second buffer layer, a via hole is provided in the insulated combination layer and the second buffer layer; and a planarization layer disposed on the thin-film transistor and the insulated combination layer, and the planarization layer fills the via hole. A manufacturing method for a display panel is also disclosed. The present invention adopts an organic flat layer to fill the via hole, which can simplify the process flow and reduce the production cost while ensuring the flexibility of the bending region.


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