The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 14, 2021
Filed:
Jun. 22, 2020
Murata Manufacturing Co., Ltd., Nagaokakyo, JP;
Koshi Himeda, Nagaokakyo, JP;
Tatsuya Kitamura, Nagaokakyo, JP;
Chiharu Sakaki, Nagaokakyo, JP;
Shinya Kiyono, Nagaokakyo, JP;
Sho Fujita, Nagaokakyo, JP;
Atsushi Yamamoto, Nagaokakyo, JP;
Takeshi Furukawa, Nagaokakyo, JP;
Kenji Nishiyama, Nagaokakyo, JP;
Tatsuya Funaki, Nagaokakyo, JP;
Kinya Aoki, Nagaokakyo, JP;
MURATA MANUFACTURING CO., LTD., Nagaokakyo, JP;
Abstract
A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.