The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2021

Filed:

Jan. 24, 2020
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Farrukh Aquil, San Diego, CA (US);

Vaishnav Srinivas, Oceanside, CA (US);

Mahalingam Nagarajan, San Diego, CA (US);

Yong Xu, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4076 (2006.01); G11C 7/10 (2006.01); G11C 11/409 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G06F 13/4243 (2013.01); G11C 7/1066 (2013.01); G11C 11/409 (2013.01);
Abstract

Signal timing drift in a synchronous dynamic random access memory (SDRAM) system may be compensated for by performing write signal timing training using a multi-purpose command (MPC) first-in-first-out (FIFO) write and MPC FIFO read at periodic intervals interspersed with mission-mode SDRAM traffic. The test result samples obtained from the write signal timing training may be analyzed independently of mission-mode SDRAM traffic. The mission-mode timing of the SDRAM data bit signals relative to the SDRAM write clock signal may be adjusted based on the analysis.


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