The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 14, 2021
Filed:
Oct. 10, 2019
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
SungWoo Kim, Gyeonggi-do, KR;
InHwa Jung, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01); H03K 3/037 (2006.01); G11C 7/20 (2006.01); G11C 7/10 (2006.01); H03K 3/356 (2006.01); H03K 17/042 (2006.01); H03F 3/45 (2006.01); G11C 11/41 (2006.01);
U.S. Cl.
CPC ...
G11C 7/065 (2013.01); G11C 7/106 (2013.01); G11C 7/20 (2013.01); H03F 3/45179 (2013.01); H03K 3/037 (2013.01); H03K 3/0375 (2013.01); H03K 3/356173 (2013.01); H03K 17/04206 (2013.01); G11C 7/1048 (2013.01); G11C 11/41 (2013.01);
Abstract
A semiconductor integrated circuit includes a sense amplifier circuit suitable for generating differential output signals by sensing and amplifying a level difference of differential input signals in response to a clock signal, and outputting the differential output signals to first and second nodes, respectively, a latch circuit suitable for feeding back and latching the differential output signals between the first and second nodes, and a control circuit suitable for controlling the feedback of the differential output signals between the first and second nodes in response to an initialization signal.