The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2021

Filed:

Jun. 04, 2019
Applicant:

Fujitsu Limited, Kawasaki, JP;

Inventors:

Yuki Kamikubo, Yokohama, JP;

Yasuharu Sato, Kawasaki, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/084 (2016.01); G06F 12/0862 (2016.01); G06F 12/0811 (2016.01); G06F 12/0875 (2016.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 12/084 (2013.01); G06F 9/30058 (2013.01); G06F 12/0811 (2013.01); G06F 12/0862 (2013.01); G06F 12/0875 (2013.01);
Abstract

An apparatus includes an instruction issuer that issues an instruction; and a cache including a cache data memory and a cache tag including cache entries, and a cache controller configured to perform cache-hit judgement, in response to a memory-access instruction issued from the instruction issuer, based on an address of the memory-access instruction and configured to issue a memory-access request to a memory in a case where the cache-hit judgement is a cache miss, wherein the cache controller registers, when issuing the memory-access request, data obtained by the memory-access request in the cache data memory, and registers provisional registration information of a provisional registration state indicating that cache registration is performed by execution of a speculative memory-access instruction in the cache tag, and judges as a speculative entry cache miss and issues the memory-access request.


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