The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2021

Filed:

Jun. 19, 2020
Applicant:

Vmware, Inc., Palo Alto, CA (US);

Inventors:

Pavlush Margarian, Dublin, CA (US);

Amarnath Palavalli, Cupertino, CA (US);

Josh Dorr, San Jose, CA (US);

Suresh Muppala, Cupertino, CA (US);

Assignee:

VMWARE, INC., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/24 (2006.01); H04L 12/26 (2006.01); H04L 29/08 (2006.01);
U.S. Cl.
CPC ...
H04L 43/06 (2013.01); H04L 41/0686 (2013.01); H04L 41/0893 (2013.01); H04L 41/22 (2013.01); H04L 67/1095 (2013.01);
Abstract

Some embodiments provide a method for collecting data regarding realized state associated with a logical network spanning multiple physical sites. At a global manager that manages a logical network, the method receives a request to collect realized state for a set of one or more logical network elements, each of which spans a set of two or more physical sites. Each physical site is managed by a local manager. For each of the logical network elements, the method identifies the set of physical sites spanned by the logical network element. For each of the logical network elements, the method sends requests for realized state of the logical network element to the local manager of each identified physical site spanned by the logical network element. The method generates a report for presentation from the realized states received from the local managers.


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