The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2021

Filed:

Jan. 16, 2019
Applicant:

Analog Bits Inc., Sunnyvale, CA (US);

Inventors:

Alan C. Rogers, Palo Alto, CA (US);

Raghunand Bhagwan, Sunnyvale, CA (US);

Assignee:

Analog Bits Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/089 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0891 (2013.01); H03L 7/0896 (2013.01);
Abstract

A charge pump includes: (I) a current source; (II) a p-channel source current network including: a first p-channel transistor; a second p-channel transistor; a p-channel current switch including at least one source terminal coupled to the drain terminal of the first p-channel transistor, at least one gate coupled to a phase comparator, and at least one drain terminal; a third p-channel transistor; and (III) a n-channel sink current network including: a first n-channel transistor; a second n-channel transistor; a third n-channel transistor; a n-channel current switch comprising at least one drain terminal coupled to the source terminal of the third n-channel transistor, at least one gate coupled to the phase comparator; and at least one source terminal coupled to the drain terminal of the first n-channel transistor; and wherein the p-channel source current network and the n-channel sink current network draw a baseline current from the first p-channel transistor.


Find Patent Forward Citations

Quick Actions:

Rogers, Alan. (2021). Method and circuits for charge pump devices of phase-locked loops (U.S. Patent No. 11115030). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11115030

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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