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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11114477 B1

PDFFull Text
Date of Patent:
Sep. 07, 2021

Filed:

Aug. 23, 2018

Array substrate and manufacturing method thereof

Applicant:

Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Wuhan, CN;

Inventors:

Caiqin Chen, Wuhan, CN;

Xing Ming, Wuhan, CN;

Assignee:

WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Wuhan, CN;

Attorneys:

Kirton McConkie

Evan R. Witt

Primary Examiner:

Dzung Tran

Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 27/32 (2006.01); H01L 51/00 (2006.01); H01L 51/56 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); H01L 27/124 (2013.01); H01L 27/1218 (2013.01); H01L 27/1222 (2013.01); H01L 27/1248 (2013.01); H01L 27/1274 (2013.01); H01L 29/66757 (2013.01); H01L 29/78675 (2013.01); H01L 27/3246 (2013.01); H01L 27/3262 (2013.01); H01L 27/3276 (2013.01); H01L 51/0097 (2013.01); H01L 51/56 (2013.01); H01L 2227/323 (2013.01); H01L 2251/5338 (2013.01);
Abstract

In a method for manufacturing an array substrate, a first photoresist pattern is formed on a buffer layer of a non-display region and the buffer layer uncovered by the first photoresist pattern is removed to form a first via hole in the non-display region. A second via hole is formed on the basis of the first via hole. The second via hole is connected to the first via hole. By forming the first via hole in the non-display region and forming the second via hole on the basis of the first via hole, completeness of film layers is ensured and product yield is improved.

Find Patent Forward Citations

Chen, Caiqin. (2021). Array substrate and manufacturing method thereof (U.S. Patent No. 11114477). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11114477

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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