The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 07, 2021
Filed:
Jan. 30, 2020
Hewlett Packard Enterprise Development Lp, Houston, TX (US);
Mir Ashkan Seyedi, Palo Alto, CA (US);
Marco Fiorentino, Fiorentino, CA (US);
Hewlett Packard Enterprise Development LP, Houston, TX (US);
Abstract
Examples herein relate to optoelectronic assemblies. In particular, implementations herein relate to an optoelectronic assembly formed via a chip on wafer on substrate (CoWoS) process. The optoelectronic assembly includes a substrate, an interposer, and an electronic integrated circuit (EIC). Each of the substrate, interposer, and EIC includes opposing first and second sides. The EIC is flip-chip assembled to the first side of the interposer, and the interposer with the EIC assembled thereto is flip-chip assembled to the first side of the substrate. An overmold layer extends over the first side of the interposer and encapsulates the EIC. The overmold layer includes a cavity such that a region of the first side of the interposer is exposed. An optical component is positioned within the cavity and coupled to the first side of the interposer.