The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 07, 2021
Filed:
Jul. 16, 2019
Applicant:
Virsec Systems, Inc., San Jose, CA (US);
Inventor:
Satya Vrat Gupta, Dublin, CA (US);
Assignee:
VIRSEC SYSTEMS, INC., San Jose, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 12/14 (2006.01); G06F 12/16 (2006.01); G08B 23/00 (2006.01); G06F 21/57 (2013.01); G06F 11/36 (2006.01); G06F 8/65 (2018.01);
U.S. Cl.
CPC ...
G06F 21/577 (2013.01); G06F 8/65 (2013.01); G06F 11/3604 (2013.01); G06F 11/3672 (2013.01); G06F 11/3684 (2013.01); G06F 2221/033 (2013.01);
Abstract
In an example embodiment, a system analyzes a set of computer routines. The system may perform an analysis including a determination of a likelihood of vulnerability to unexpected behavior for one or more computer routines of the set. Based upon the analysis, the system may identify one or more computer routines of the set having the likelihood of vulnerability. The system may asynchronously and dynamically manipulate at least one of the one or more computer routines through a testing technique. The system may determine unexpected behavior of at least one of the one or more computer routines.