The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2021

Filed:

Dec. 19, 2017
Applicant:

Stmicroelectronics (Rousset) Sas, Rousset, FR;

Inventors:

Pierre Guillemin, Marseilles, FR;

William Orlando, Peynier, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/52 (2013.01); G06F 9/00 (2006.01);
U.S. Cl.
CPC ...
G06F 21/52 (2013.01); G06F 9/00 (2013.01); G06F 2221/2123 (2013.01); G06F 2221/2153 (2013.01);
Abstract

A hardware monitor circuit includes an electronic control circuit coupled to a processing unit. The electronic control circuit generates multi-bit protection codes and directs operations of the hardware monitor circuit. A bus interface is coupled to an address bus of the processing unit, and the bus interface passes signals associated with a stack structure of the processing unit. The stack structure is arranged to store the multi-bit protection codes in an internal memory coupled to the processing unit. Comparators in the hardware monitor circuit are arranged to accept values from the internal memory and gating logic coupled to the comparators is arranged to generate an error signal when it detects that an address on the address bus read via the bus interface is equal to an address stored in the internal memory. Upon generating the error signal, the processing unit is placed in a secure mode.


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