Interrupt processing method, master chip, slave chip, and multi-chip system

Abstract

The present disclosure relates to the field of a multi-chip system, and provides an interrupt processing method, a master chip, a slave chip, and a multi-chip system. An interrupt processing method is applied to a master chip and includes: when an interrupt transport request sent by a slave chip through an interrupt line is detected, obtaining all current interrupt requests (irq_s_-irq_s_N) of the slave chip, the interrupt request (irq_s__-irq_s_N) is generated by a first peripheral () of the slave chip; obtaining an interrupt subroutine corresponding to each of the interrupt requests (irq_s_-irq_s_N), and processing the corresponding interrupt request (irq_s_-irq_s_N) by using the interrupt subroutine. In the embodiments of the present disclosure, all the interrupt requests (irq_s_-irq_s_N) of the slave chip are mapped to the master chip, so that the interrupt processing flow of the peripheral on the slave chip is simplified.