The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2021

Filed:

Jun. 28, 2018
Applicants:

Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Guohua Wang, Beijing, CN;

Wenming Ren, Beijing, CN;

Fei Gao, Beijing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/136 (2006.01); G02F 1/1362 (2006.01); H01L 27/12 (2006.01); G02F 1/1337 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136204 (2013.01); G02F 1/136286 (2013.01); H01L 27/124 (2013.01); G02F 1/133784 (2013.01);
Abstract

An array substrate includes a display region and a wiring region. The wiring region includes a plurality of sets of signal line leads and a plurality of wiring regions, and a same set of signal line leads extends to a same bonding region disposed in the wiring region. The wiring region further includes at least one auxiliary wiring structure. Each auxiliary wiring structure is disposed between adjacent two sets of signal line leads and includes a peripheral closed wiring loop. Each peripheral closed wiring loop includes a plurality of corner portion, and a shape of at least one corner portion proximate to the display region is a curve.


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