The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 31, 2021
Filed:
Dec. 04, 2019
Applicant:
Nvidia Corp., Santa Clara, CA (US);
Inventors:
Matthias Augustin Blumrich, Ridgefield, CT (US);
Nan Jiang, Acton, MO (US);
Larry Robert Dennison, Santa Clara, CA (US);
Assignee:
NVIDIA Corp., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/08 (2006.01); H04L 12/933 (2013.01); H04L 12/935 (2013.01); H04L 12/861 (2013.01); H04L 12/937 (2013.01); H04L 12/931 (2013.01);
U.S. Cl.
CPC ...
H04L 49/101 (2013.01); H04L 49/254 (2013.01); H04L 49/3036 (2013.01); H04L 49/70 (2013.01); H04L 49/9047 (2013.01);
Abstract
A switch architecture enables ports to stash packets in unused buffers on other ports, exploiting excess internal bandwidth that may exist, for example, in a tiled switch. This architecture leverages unused port buffer memory to improve features such as congestion handling and error recovery.