The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2021

Filed:

Dec. 30, 2019
Applicant:

Denso Corporation, Kariya, JP;

Inventors:

Yuichi Takeuchi, Kariya, JP;

Shuhei Mitani, Kariya, JP;

Yasuhiro Ebihara, Kariya, JP;

Yusuke Yamashita, Nagakute, JP;

Tadashi Misumi, Toyota, JP;

Assignee:

DENSO CORPORATION, Kariya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 29/78 (2006.01); H01L 29/16 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7803 (2013.01); H01L 29/0615 (2013.01); H01L 29/1608 (2013.01); H01L 29/66734 (2013.01);
Abstract

A semiconductor device includes an inversion type semiconductor element, which has: a substrate; a drift layer; a saturation current suppression layer; a current dispersion layer; a base region; a source region; a connection layer; a plurality of trench gate structures; an interlayer insulation film; a source electrode; and a drain electrode. A channel region is provided in a portion of the base region in contact with each trench gate structure by applying a gate voltage to the gate electrode and applying a normal operation voltage as a drain voltage to the drain electrode; and a current flows between the source electrode and the drain electrode through the source region and the JFET portion.


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