The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2021

Filed:

Dec. 05, 2018
Applicant:

Wuhan Xinxin Semiconductor Manufacturing Co., Ltd., Hubei, CN;

Inventors:

Chaoran Zhang, Hubei, CN;

Jun Zhou, Hubei, CN;

Yun Li, Hubei, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/324 (2006.01); H01L 21/225 (2006.01); H01L 21/321 (2006.01); H01L 27/11517 (2017.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 21/324 (2013.01); H01L 21/2253 (2013.01); H01L 21/3212 (2013.01); H01L 27/11517 (2013.01); H01L 21/76229 (2013.01);
Abstract

A floating gate fabrication method is disclosed. The method includes: providing a substrate, and depositing an oxide layer on the substrate; fabricating a shallow trench isolation in the substrate, a top surface of the shallow trench isolation being higher than a top surface of the oxide layer; depositing a polysilicon layer on the oxide layer and the shallow trench isolation; performing a first thermal annealing process on the polysilicon layer, thereby repairing cavities formed after the deposition of the polysilicon layer; implanting ions into the polysilicon layer; performing a second thermal annealing process on the polysilicon layer, thereby activating the implanted ions and repairing again the cavities formed after the deposition of the polysilicon layer; and planarizing the polysilicon layer to form a floating gate.


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