The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2021

Filed:

Nov. 02, 2018
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Aniket Naik, Fremont, CA (US);

Siddharth Bhargav, Campbell, CA (US);

Bardia Zandian, Santa Clara, CA (US);

Narayan Kulshrestha, Fremont, CA (US);

Amit Pabalkar, Fremont, CA (US);

Arvind Gopalakrishnan, Fremont, CA (US);

Justin Tai, San Jose, CA (US);

Sachin Satish Idgunji, San Jose, CA (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/26 (2006.01); G06F 1/3206 (2019.01); G06F 9/50 (2006.01); G06F 1/3296 (2019.01); G06F 1/28 (2006.01); G06N 20/00 (2019.01); G06N 5/04 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3206 (2013.01); G06F 1/28 (2013.01); G06F 1/3296 (2013.01); G06F 9/5094 (2013.01); G06N 20/00 (2019.01); G06N 5/04 (2013.01);
Abstract

Integrated circuits, or computer chips, typically include multiple hardware components (e.g. memory, processors, etc.) operating under a shared power (e.g. thermal) constraint that is sourced by one or more power sources for the chip. Typically, the hardware components can be individually configured to operate at certain states (e.g. to operate at a certain frequency by setting a clock speed for a clock dedicated to the hardware component). Thus, each hardware component can be configured to operate at an operating point that is determined to be optimal, usually in terms of achieving some desired goal for a specific application (e.g. frame rates for gaming, etc.). In the context of chip hardware that operates under a shared power/thermal constraint, a method, computer readable medium, and system are provided for determining the optimal operating point for the chip that takes into consideration both performance of the chip and power consumption by the chip.


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