The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 24, 2021
Filed:
Aug. 30, 2019
Keysight Technologies, Inc., Santa Rosa, CA (US);
Gerald Raymond Pepper, Newbury Park, CA (US);
Sanjay Cartic, Woodland Hills, CA (US);
Hadrien Louchet, Stuttgart, DE;
Keysight Technologies, Inc., Santa Rosa, CA (US);
Abstract
Conventional test systems can experience issues when attempting to test network nodes or system with realistic high speed forward error correction (FEC) encoded test data. For example, a test system may use a packet data generator to generate eight data streams or lanes of 50 Gigabits per second (Gbps) test data and may then use a multiplexer to combine the eight lanes into a 400 Gbps data stream for transmission using 4-level pulse amplitude modulation (PAM4). To generate a high speed data stream comprising multiple data lanes, the test system may be required to use a master clock or other time synchronization technique to keep the data lanes in sync. Further, to generate an FEC encoded high speed data stream comprising multiple data lanes, the test system may perform FEC encoding across all of the data lanes comprising the high speed data stream, which can make test data modifications difficult afterwards. Hence, issues can arise if a packet data generator lacks capabilities, e.g., analog distortion or analog fuzzing features, that are needed for testing some aspect of network node functionality.