The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2021

Filed:

Apr. 13, 2020
Applicant:

The Board of Trustees of the Leland Stanford Junior University, Stanford, CA (US);

Inventors:

Juan Rivas-Davila, Palo Alto, CA (US);

Jiale Xu, Stanford, CA (US);

Lei Gu, Stanford, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); H02M 7/537 (2006.01); H02M 7/00 (2006.01); H02M 1/08 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H03K 17/163 (2013.01); H02M 1/083 (2013.01); H02M 7/003 (2013.01); H02M 7/537 (2013.01); H02M 2001/0058 (2013.01);
Abstract

In specific examples, aspects are directed towards eliminating, mitigating or reducing gate loss in circuits including, for example, WBG power devices. One such example is directed towards an apparatus including first and second types of field-effect transistor (FET), where the first type is characterized as being a normally-on FET in a switching-circuit operation with a high-voltage rating, and the second type of FET is characterized as being a normally-off FET in a switching-circuit operation with a voltage rating that is much less than the high-voltage rating of the first type of FET circuit. The FET are arranged in a cascode manner so that, in response to a switching control signal received by the second type of FET circuit, the second type of FET circuit is active to drive the first type of FET.


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