The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2021

Filed:

Jan. 22, 2020
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Takumi Ogino, Koganei, JP;

Hiroaki Kobayashi, Kawasaki, JP;

Tsutomu Tange, Yokohama, JP;

Akihiro Shimizu, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14634 (2013.01); H01L 23/5226 (2013.01); H01L 24/08 (2013.01); H01L 27/14636 (2013.01); H01L 2224/08145 (2013.01);
Abstract

A semiconductor apparatus comprising: a first semiconductor component including a first semiconductor layer and a first insulation film; and a second semiconductor component including a second semiconductor layer and a second insulation film, wherein the first semiconductor component and the second semiconductor component are bonded to each other by each of a plurality of first electric conductor portions provided in the first insulation film and each of a plurality of second electric conductor portions provided in the second insulation film, each of the plurality of first electric conductor portions is constituted by one pad surrounded by the first insulation film and N vias bonded to the one pad so as to be positioned between the one pad and the first semiconductor layer, and a volume VTR of the one pad and a total volume VTH of the N vias satisfy VTR/VTH≥N.


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