The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2021

Filed:

Sep. 22, 2020
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Seong Ju Lee, Hwaseong-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/38 (2006.01); H01L 25/065 (2006.01); H01L 23/49 (2006.01); H01L 23/48 (2006.01); H01L 25/18 (2006.01);
U.S. Cl.
CPC ...
G11C 29/38 (2013.01); H01L 23/481 (2013.01); H01L 23/49 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01);
Abstract

A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device controls a test mode. The first semiconductor device outputs a chip identification and receives external data. The second semiconductor device includes a plurality of memory chips. At least one of the plurality of memory chips are activated based on the chip identification to store input data into each of the plurality of memory chips that have been activated while a write operation is performed in the test mode. At least two of the plurality of memory chips are activated based on the chip identification to output the stored input data as the external data while a read operation is performed in the test mode.


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