The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2021

Filed:

Feb. 04, 2020
Applicant:

Samsung Display Co., Ltd., Yongins-si, KR;

Inventors:

Yang Hwa Choi, Yongin-si, KR;

Sun Kwang Kim, Yongin-si, KR;

Sang Jin Jeon, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01);
U.S. Cl.
CPC ...
G09G 3/32 (2013.01); G09G 2300/0408 (2013.01); G09G 2310/0278 (2013.01); G09G 2310/0294 (2013.01); G09G 2310/08 (2013.01);
Abstract

A scan driver includes two or more scan signal output circuits (SSOC), each being coupled to a first scan line (FSL) and a second scan line (SSL), and including a driving circuit, a first buffer circuit (FBC), and a second buffer circuit (SBC). The driving circuit applies a first driving signal (DS) to a first driving node (DN) and applies a second DS to a second DN based on an input signal, a clock signal (CS), a display-on signal, and an on-level voltage. The input signal is a scan start signal or a previous scan signal. The FBC outputs a sensing signal to the SSL based on the first DS, the second DS, an off-level voltage, and a sensing CS. The SBC outputs a scan signal to the FSL based on the first DS, the second DS, the off-level voltage, and a scan CS.


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