The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2021

Filed:

Jun. 11, 2019
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Yuki Hayakawa, Tokyo, JP;

Toshiyuki Hiraki, Tokyo, JP;

Sho Yamanaka, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/362 (2006.01); G06F 12/14 (2006.01); G06F 13/20 (2006.01); H04L 12/403 (2006.01);
U.S. Cl.
CPC ...
G06F 13/362 (2013.01); G06F 12/1458 (2013.01); G06F 13/20 (2013.01); H04L 12/403 (2013.01);
Abstract

Even under various conditions, stay of request on a bus is eliminated, and memory efficiency can be improved. Each of a master A, a master B, and a master X issues an access request to a memory. A memory controller receives an access request through a bus. A central bus control unit controls output of an access request issued by a master to the memory controller through granting the master an access right to the memory. The central bus control unit manages the number of rights that can be granted, which indicates the number of the access rights that can be granted, based on an access size of an access request issued by the master to which the access right is granted, and performs grant of the access right within a range of the number of rights that can be granted.


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