The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2021

Filed:

Jul. 01, 2019
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventor:

Chun-Shun Huang, Taoyuan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/45 (2006.01); H01L 21/28 (2006.01); H01L 21/285 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66515 (2013.01); H01L 21/28052 (2013.01); H01L 21/28518 (2013.01); H01L 29/0653 (2013.01); H01L 29/456 (2013.01); H01L 29/4933 (2013.01); H01L 29/665 (2013.01);
Abstract

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a gate electrode, a drain region, a source region, an isolating layer, a plurality of metal contacts, a plurality of conductive plugs, and a contact liner. The gate electrode is disposed on the substrate. The drain region and the source region are disposed in the substrate and on opposite sides of the gate electrode. The isolating layer is disposed over the substrate and the gate electrode. The metal contacts are disposed in the gate electrode, the source region, and the drain region. The conductive plugs are disposed in the isolating layer and electrically coupled to the metal contacts. The contact liner surrounds the conductive plugs. The present disclosure further provides a method for manufacturing the semiconductor device.


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