The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2021
Filed:
Aug. 23, 2018
Analog Devices International Unlimited Company, Limerick, IE;
Steven J. Tanghe, Essex Junction, VT (US);
Kevin R. Wrenner, Essex Junction, VT (US);
Michael Amato, Livermore, CA (US);
Analog Devices International Unlimited Company, Limerick, IE;
Abstract
The subject technology provides for an architecture that isolates two interfaces of a circuit with an isolating communication element while also protecting against overstress transients such as electro-static discharge (ESD) and other electrical overstress (EOS) transients across the isolating communication element that can be significantly larger than the ESD rating of the isolating communication element, and/or that may be repeated in succession. The subject technology provides isolation using a two die implementation with an isolation interface including an isolation tub in each die, or a single die containing both isolation tubs in the die. The two dice include respective substrates that are connected together and float with respect to any signal or ground. The isolation enables a large offset voltage on the order of hundreds of volts to exist between the sides. Being relatively large, each isolation tub can handle a significant amount of energy.