The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2021
Filed:
Mar. 12, 2020
Applicant:
Sandisk Technologies Llc, Addison, TX (US);
Inventors:
Nagesh Vodrahalli, Los Altos, CA (US);
Shrikar Bhagath, San Jose, CA (US);
Rama Shukla, Saratoga, CA (US);
Assignee:
SanDisk Technologies LLC, Plano, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/562 (2013.01); H01L 24/08 (2013.01); H01L 24/48 (2013.01); H01L 25/50 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/48147 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06586 (2013.01); H01L 2924/3511 (2013.01);
Abstract
A semiconductor device is disclosed including a memory module formed from a pair of semiconductor dies mounted face to face to each other at the wafer level, mechanically resulting in the die pair having a minimum warpage. An electronic component may be bonded to an exposed surface of one of the semiconductor dies.
Vodrahalli, Nagesh. (2021). Memory scaling semiconductor device (U.S. Patent No. 11094674). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11094674
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile