The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2021

Filed:

Jun. 27, 2019
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Lee Kong Yu, Penang, MY;

Sungjun Im, San Jose, CA (US);

Chun Sean Lau, Penang, MY;

Yoong Tatt Chin, Penang, MY;

Paramjeet Singh Gill, Kuala Lumpur, MY;

Weng-Hong Teh, Fremont, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 23/31 (2006.01); H01L 23/373 (2006.01); H01L 21/66 (2006.01); H01L 21/56 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3675 (2013.01); H01L 21/4871 (2013.01); H01L 21/56 (2013.01); H01L 22/20 (2013.01); H01L 23/3121 (2013.01); H01L 23/3171 (2013.01); H01L 23/3185 (2013.01); H01L 23/3736 (2013.01); H01L 23/562 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2224/05 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05181 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81385 (2013.01); H01L 2224/81395 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/81908 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/14 (2013.01); H01L 2924/16151 (2013.01); H01L 2924/16195 (2013.01); H01L 2924/16235 (2013.01); H01L 2924/3512 (2013.01);
Abstract

A reliability cover that is disposed over at least one of an integrated circuit package and a Si die of the integrated circuit package is disclosed. The integrated circuit package is mountable to a printed circuit board via a plurality of solder balls. The reliability cover is configured to reduce a difference in a coefficient of thermal expansion between the integrated circuit package and the printed circuit board, and between the Si die and a substrate of the integrated circuit package by a threshold value.


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