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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11094594 B1

PDFFull Text
Date of Patent:
Aug. 17, 2021

Filed:

Aug. 09, 2018

Semiconductor structure with buried power rail, integrated circuit and method for manufacturing the semiconductor structure

Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventor:

Po-Chao Tsao, New Taipei, TW;

Assignee:

MediaTek Inc., Hsin-Chu, TW;

Attorney:

Wolf, Greenfield & Sacks, P.C.

Primary Examiner:

Samuel A Gebremariam

Assistant Examiner:

Jonas T Beardsley

Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/74 (2006.01); H01L 21/768 (2006.01); H01L 29/78 (2006.01); H01L 21/8238 (2006.01); H01L 23/528 (2006.01); H01L 27/092 (2006.01); H01L 21/762 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823481 (2013.01); H01L 21/743 (2013.01); H01L 21/76224 (2013.01); H01L 21/76877 (2013.01); H01L 21/76895 (2013.01); H01L 21/76897 (2013.01); H01L 21/823418 (2013.01); H01L 21/823475 (2013.01); H01L 21/823493 (2013.01); H01L 21/823821 (2013.01); H01L 21/823871 (2013.01); H01L 23/5286 (2013.01); H01L 27/0924 (2013.01); H01L 29/6681 (2013.01); H01L 29/7853 (2013.01); H01L 21/823878 (2013.01);
Abstract

A semiconductor structure is provided. The semiconductor structure includes a shallow trench isolation (STI) region on a well region of a substrate, a plurality of transistors, and a power rail. Each of the transistors includes at least one fin, a gate electrode formed on the fin, and a doping region formed on the fin. The fin is formed on the well region, and is extending in a first direction. The gate electrode is extending in a second direction that is perpendicular to the first direction. The power rail is formed in the STI region and below the doping regions of the transistors, and extending in the first direction. Each of the doping regions is electrically connected to the power rail, so as to form a source region of the respective transistor. The power rail is electrically connected to the well region of the substrate.

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