The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2021

Filed:

Apr. 18, 2018
Applicant:

Osram Oled Gmbh, Regensburg, DE;

Inventors:

Mathias Wendt, Hausen, DE;

Andreas Weimar, Regensburg, DE;

Assignee:

OSRAM OLED GmbH, Regensburg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 21/768 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 21/60 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4846 (2013.01); H01L 21/76885 (2013.01); H01L 23/498 (2013.01); H01L 24/04 (2013.01); H01L 24/05 (2013.01); H01L 24/82 (2013.01); H01L 2021/60015 (2013.01); H01L 2021/6027 (2013.01); H01L 2021/60277 (2013.01);
Abstract

A method of attaching a semiconductor chip on a lead frame includes A) providing a semiconductor chip, B) applying a solder metal layer sequence to the semiconductor chip, wherein the solder metal layer sequence includes a first metallic layer including indium or an indium-tin alloy, C) providing a lead frame, D) applying a metallization layer sequence to the lead frame, wherein the metallization layer sequence includes a fourth layer including indium and/or tin arranged above the lead frame and a third layer including gold arranged above the fourth layer, E) forming an intermetallic intermediate layer including gold and indium, gold and tin or gold, tin and indium, G) applying the semiconductor chip to the lead frame via the solder metal layer sequence and the intermetallic intermediate layer, and H) heating the arrangement produced in G) to attach the semiconductor chip to the lead frame.


Find Patent Forward Citations

Loading…