The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2021

Filed:

Dec. 04, 2018
Applicant:

Vmware, Inc., Palo Alto, CA (US);

Inventors:

Wenguang Wang, Santa Clara, CA (US);

Abhishek Srivastava, Palo Alto, CA (US);

Ashish Kaila, Cupertino, CA (US);

Julien Freche, Palo Alto, CA (US);

Assignee:

VMware, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0871 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0871 (2013.01); G06F 2212/1021 (2013.01); G06F 2212/16 (2013.01); G06F 2212/6042 (2013.01);
Abstract

The disclosure provides a technique for reducing cache misses to a cache of a computer system. The technique includes deallocating memory pages of the cache from one process and allocating those memory pages to another process based on cache misses of each process during a given time period. Repeating the technique leads the total number of cache misses to the cache to gradually decrease to an optimum or near optimum level. The repetition of the technique leads to a dynamic and flexible apportionment of cache memory pages to processes running within the computer system.


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