The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2021

Filed:

Nov. 09, 2018
Applicant:

Halliburton Energy Services, Inc., Houston, TX (US);

Inventors:

David L. Perkins, The Woodlands, TX (US);

Michael T. Pelletier, Houston, TX (US);

James M. Price, Spring, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
B05D 7/00 (2006.01); B32B 38/00 (2006.01); C23C 18/16 (2006.01); G01N 21/27 (2006.01); G01N 21/31 (2006.01); G01N 21/3577 (2014.01); G01N 21/85 (2006.01); G02B 27/00 (2006.01); C23C 16/455 (2006.01); E21B 49/08 (2006.01); G01V 8/10 (2006.01); G01N 21/3581 (2014.01); G01N 21/359 (2014.01); G01N 21/64 (2006.01); G01N 21/65 (2006.01); G01J 3/12 (2006.01); G01N 21/84 (2006.01);
U.S. Cl.
CPC ...
B05D 7/50 (2013.01); B32B 38/0004 (2013.01); C23C 16/45525 (2013.01); C23C 18/165 (2013.01); E21B 49/08 (2013.01); G01N 21/274 (2013.01); G01N 21/31 (2013.01); G01N 21/3577 (2013.01); G01N 21/85 (2013.01); G01V 8/10 (2013.01); G02B 27/0012 (2013.01); G01J 2003/1213 (2013.01); G01J 2003/1282 (2013.01); G01N 21/359 (2013.01); G01N 21/3581 (2013.01); G01N 21/645 (2013.01); G01N 21/65 (2013.01); G01N 2021/317 (2013.01); G01N 2021/3129 (2013.01); G01N 2021/3133 (2013.01); G01N 2021/3177 (2013.01); G01N 2021/8438 (2013.01);
Abstract

Disclosed are methods of fabricating an integrated computational element for use in an optical computing device. One method includes providing a substrate that has a first surface and a second surface substantially opposite the first surface, depositing multiple optical thin films on the first and second surfaces of the substrate via a thin film deposition process, and thereby generating a multilayer film stack device, cleaving the substrate to produce at least two optical thin film stacks, and securing one or more of the at least two optical thin film stacks to a secondary optical element for use as an integrated computational element (ICE).


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