The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Sep. 27, 2018
Applicant:

Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Shenzhen, CN;

Inventors:

Liwang Song, Shenzhen, CN;

Zhaohui Li, Shenzhen, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G02F 1/136222 (2021.01); G02F 1/136286 (2013.01); H01L 27/1259 (2013.01);
Abstract

The invention provides an array substrate and manufacturing method thereof. The array substrate comprises: a substrate; a plurality of data lines and scan lines disposed on one side of the substrate, the data lines and the scan lines defining a plurality of sub-pixel areas, the data lines and the scan lines being mutually insulated, the data lines extending in a first direction and being arranged in a second direction crossing the first direction, the scan lines extending in the second direction and being arranged in the first direction; a color-resist layer disposed on the same side of the substrate with the data lines and the scan lines, the color-resist layer comprising a plurality of color-resists, and two adjacent color-resists of the plurality of color-resists having an overlapping area corresponding to an area of a respective one of the data lines; a data black matrix (BM) saving (DBS) common electrode wire extending in the first direction and disposed on a side of the overlapping area of the color-resist layer away from the substrate to shield a data line of the plurality of data lines, and uniform slits disposed at an edge of the DBS common electrode wire in plan view, the uniform slits extending in the second direction and being arranged in the first direction.


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