The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Nov. 12, 2019
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Yoong Oh, Suwon-si, KR;

Sang Hoon Kim, Suwon-si, KR;

Young Kuk Ko, Suwon-si, KR;

Yong Soon Jang, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 23/14 (2006.01); H01L 23/498 (2006.01); H01L 23/13 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 23/485 (2006.01); H01L 23/525 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 23/3128 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01);
Abstract

A package substrate includes a wiring substrate comprising an insulating layer, a first wiring layer, and a second wiring layer, wherein the first wiring layer comprises a first pad pattern, and the second wiring layer comprises a second pad pattern; a first passivation layer disposed on the insulating layer, and having a first opening portion passing through a region corresponding to at least a portion of the first pad pattern; a second passivation layer disposed on the insulating layer, and having a second opening portion passing through a region corresponding to at least a portion of the second pad pattern; and a reinforcing layer disposed on the second passivation layer, and having a through portion exposing the second opening portion. An upper surface of the first wiring layer is located in a position higher than a position of the lower surface of the insulating layer.


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